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Common Avionics Enabler SW/FW Engineer

Job No.: 2018PVN

Job Description

This temporary (6 month) position primarily provides software and firmware specification, development, verification support for the Common Avionics Enabler for the AES program in support of ISS and ORION.

Specific duties may include the following:

  • Port gen1 CAE/RS-422 High-level Data Link Control (HDLC) FW and SW to gen2 Modular Integrated Stackable Layers (MISL) Field Programmable Gate Array (FPGA) board and completely build up an integrated CAE with Hybrid Electronic Radiation Assessor (HERA) for delivery to Lockheed Martin (LM) requirement.
  • Complete any updates needed for Modular Integrated Stackable Layers (MISL) FPGA VHSIC Hardware Description Language (VHDL) tutorials for FW development
  • Check out and expand interface capabilities of MISL FPGA board with the new interface board
  • Develop and apply software, hardware, and standards knowledge in the analysis and development of software and firmware.
  • Participate in reviews including design and test readiness reviews
  • Other tasks and activities as required.

Work Environment:
Office environment. Requires ability to provide clear, concise, accurate and timely communication, both verbally and in writing (100%). Requires ability to interact professionally with co-workers, management, and client (100%). No significant travel is anticipated for this position.

Physical Requirements:
Requires sitting for extended periods of time in meetings with peers, management, and with our client at NASA facilities to discuss technical issues (10%). Also, requires sitting for extended periods of time at a desk to write reports and perform engineering tasks (80%). Requires ability to use stairs or elevators for access between floors and multiple buildings at NASA facilities (10%).

Equipment and Machines:
Requires ability to operate a personal computer, a telephone, fax machine, copier, calculator, and other general office equipment (100%).

Normal workday is from 7:30 a.m. through 4:30 p.m., Monday thru Friday. Minimal overtime may be required (10%) to meet schedule milestones and to support technical demands of the job. Regular attendance is a necessity and adequate arrangements for delegating duties during absences are required.

Other Essential Functions:
The ability to work independently with minimal supervision, and to make rational decisions, and to exercise good judgment is essential (100%). Grooming and dress must be appropriate for the position and must not impose a safety risk/hazard to the employee or others.

Qualifications & Experience

Degree in Engineering or related field from an ABET-accredited university is required with at least 30 years of experience. Hands on experience in analog and digital design and communications, particularly in spacecraft applications is required. Experience with networking devices and protocols an asset. Experience in embedded systems processors, linear and non-linear feedback control systems an asset.

The ideal candidate shall have at least 1 year current experience with CAE/RS-422 High-level Data Link Control (HDLC) FW and SW and also with Modular Integrated Stackable Layers (MISL) Field Programmable Gate Array (FPGA) boards.

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